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MC14067B
Analog Multiplexers / Demultiplexers
The MC14067 multiplexer/demultiplexer is a digitally controlled analog switch featuring low ON resistance and very low leakage current. This device can be used in either digital or analog applications. The MC14067 is a 16-channel multiplexer/demultiplexer with an inhibit and four binary control inputs A, B, C, and D. These control inputs select 1-of-16 channels by turning ON the appropriate analog switch (see MC14067 truth table.)
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24 PDIP-24 P SUFFIX CASE 709 MC14067BCP AWLYYWW 1 24 SOIC-24 DW SUFFIX CASE 751E 1 A = Assembly Location WL or L = Wafer Lot YY or Y = Year WW or W = Work Week 14067B AWLYYWW
* * * * * * *
Low OFF Leakage Current Matched Channel Resistance Low Quiescent Power Consumption Low Crosstalk Between Channels Wide Operating Voltage Range: 3 to 18 V Low Noise Pin for Pin Replacement for CD4067B
II I I IIIIIIIIIIIIIIIIIII I I II I I I IIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII I I I I I I IIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII II I I II I IIIIIIIIIIIIIIIIII I I I I IIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII I II I I I IIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIII I I I IIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIII
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1.)
Symbol VDD Parameter Value DC Supply Voltage Range Unit V V - 0.5 to + 18.0 Vin, Vout Iin Input or Output Voltage Range (DC or Transient) - 0.5 to VDD + 0.5 10 25 500 Input Current (DC or Transient), per Control Pin Switch Through Current Power Dissipation, per Package (Note 2.) mA mA Isw PD TA mW Ambient Temperature Range Storage Temperature Range Lead Temperature (8-Second Soldering) - 55 to + 125 - 65 to + 150 260
ORDERING INFORMATION
Device Package PDIP-24 SOIC-24 SOIC-24 Shipping 15/Rail 30/Rail 1000/Tape & Reel
MC14067BCP MC14067BDW MC14067BDWR2
_C _C _C
Tstg TL
1. Maximum Ratings are those values beyond which damage to the device may occur. 2. Temperature Derating: Plastic "P and D/DW" Packages: - 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, Vin and Vout should be constrained to the range VSS (Vin or Vout) VDD. Unused inputs must always be tied to an appropriate logic voltage level (e.g., either VSS or VDD). Unused outputs must be left open.
v
v
(c) Semiconductor Components Industries, LLC, 2000
1
March, 2000 - Rev. 3
Publication Order Number: MC14067B/D
MC14067B
MC14067 TRUTH TABLE
Control Inputs A X 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 B X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 C X 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 D X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 Inh 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 Selected Channel None X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
MC14067B PIN ASSIGNMENT
X X7 X6 X5 X4 X3 X2 X1 X0 A B VSS 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 VDD X8 X9 X10 X11 X12 X13 X14 X15 INHIBIT C D
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MC14067B
MC14067B 16-Channel Analog Multiplexer/Demultiplexer
15 10 11 14 13 9 8 7 6 5 4 3 2 23 22 21 20 19 18 17 16 INHIBIT A B C D X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
CONTROLS
X
1
COMMON OUT/IN
SWITCHES IN/OUT
VDD = PIN 24 VSS = PIN 12
MC14067 FUNCTIONAL DIAGRAM
INHIBIT A B C D X0 X1 X2 X3 X4 X5 X6 X7 X8 X9 X10 X11 X12 X13 X14 X15
CONTROL INPUTS
1-OF-16 DECODER
X IN/OUT
X OUT/IN
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II I I I I I I I I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII III III II II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIII IIIIIII III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII III III II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII III III II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIII III IIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIII IIIIIII III III II II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII III III II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIII I I IIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIII II I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIII IIIIIII III III II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIII III III II II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII I I III II I IIIIIIIIIIIIIIIIIIIII IIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I I III III II I I I I I I I IIIIIIII II IIIIIIIIIIIIIIIIIIIIIIIIIIIIIII I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III II IIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIII I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII II I I I I I I I IIIIIIII III I IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIII III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIII IIIIIIIIIIIIIIIIIIIIII II I I III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII IIII III III IIIIIIIIIIIIIIIIIIIIIIIIIIIIIIIII
3. Data labeled "Typ" is not to be used for design purposes, but is intended as an indication of the IC's potential performance. 4. For voltage drops across the switch (Vswitch) > 600 mV ( > 300 mV at high temperature), excessive VDD current may be drawn; i.e. the current out of the switch may contain both VDD and switch input components. The reliability of the device will be unaffected unless the Maximum Ratings are exceeded. (See first page of this data sheet.) SWITCHES IN/OUT AND COMMONS OUT/IN -- X, Y (Voltages Referenced to VSS) CONTROL INPUTS -- INHIBIT, A, B, C, D (Voltages Referenced to VSS) SUPPLY REQUIREMENTS (Voltages Referenced to VSS)
ELECTRICAL CHARACTERISTICS
Capacitance, Feedthrough (Channel Off)
Capacitance, Common O/I
Capacitance, Switch I/O
Off-Channel Leakage Current (Figure 2)
ON Resistance Between Any Two Channels in the Same Package
ON Resistance
Output Offset Voltage
Recommended Static or Dynamic Voltage Across the Switch (4.) (Figure 1)
Recommended Peak-to- Peak Voltage Into or Out of the Switch
Input Capacitance
Input Leakage Current
High-Level Input Voltage
Low-Level Input Voltage
Total Supply Current (Dynamic Plus Quiescent, Per Package
Quiescent Current Per Package
Power Supply Voltage Range
Characteristic
Symbol
Vswitch
ID(AV)
Ron
VOO
VDD
CI/O
CO/I
CI/O
VI/O
Ron
VIH
IDD
Cin
VILIII on = per spec, 5.0 R 10 Ioff = per spec 15
Ioff
Iin
VDD
5.0 10 15
5.0 10 15
5.0 10 15
5.0 10 15
5.0 10 15
15
15
-- --
--
--
--
--
--
--
--
Control Inputs: Vin = VSS or VDD, Switch I/O: VSS VI/O VDD, and Vswitch mV (4.)
Pins Not Adjacent Pins Adjacent
Inhibit = VDD (MC14067B) (MC14097B)
Inhibit = VDD
Vin = VIL or VIH (Control) Channel to Channel or Any One Channel
Vswitch 500 mV Vin = VIL or VIH (Control), and Vin 0 to VDD (Switch)
Vin = 0 V, No Load
Channel On
Channel On or Off
Vin = 0 or VDD
Ron = per spec, Ioff = per spec
TA = 25_C only (The channel component, (Vin - Vout)/Ron, is not included.)
Test Conditions
v
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v v500
MC14067B
(4.),
4
v
Min
3.5 7.0 11
3.0
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0 0
- 55C
Typical
100
0.1
MaxIII (3.) Min Typ
VDD
800 400 220
600
1.5 3.0 4.0
5.0 10 20
70 50 45
18
-- -- -- -- -- -- -- -- --
3.5 7.0 11
3.0
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0 0
(0.07 A/kHz) f + IDD (0.20 A/kHz) f + IDD (0.36 A/kHz) f + IDD
0.00001
0.05
0.005 0.010 0.015
25_C
0.47 2.75 5.50 8.25 2.25 4.50 6.75 100 60 250 120 80 5.0 10 25 10 10 10 -- -- --
100
1050 500 280
0.1
Max
VDD
600
7.5
1.5 3.0 4.0
5.0 10 20
70 50 45
18
-- -- -- -- -- -- -- --
Min
3.5 7.0 11
3.0
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0 0
125_C
1000
1300 550 320
Max
VDD
135 95 65
300
150 300 600
1.0
1.5 3.0 4.0
18
-- -- -- -- -- -- -- -- --
Unit
Vp-p
mV
V
A
A
A
nA
pF pF pF pF V V V
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5. Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
ELECTRICAL CHARACTERISTICS (CL = 50 pF, TA = 25_C)
Crosstalk, Control Inputs-to-Common O/I (R1 = 1 k, RL = 10 k, Control tr = tf = 20 ns, Inhibit = VSS)
Channel Separation [RL = 1 k, Vin = 1/2 (VDD-VSS) p-p (sine-wave)]
Off Channel Feedthrough Attenuation [RL = 1 k, Vin = 1/2 (VDD-VSS) p-p(sine-wave)] fin = 20 MHz - MC14067B
ON Channel Bandwidth [RL = 1 k, Vin = 1/2 (VDD - VSS) p-p(sine-wave)] 20 Log10 (Vout/Vin) = - 3 dB
Second Harmonic Distortion (RL = 10 k, f = 1 kHz, Vin = 5 Vp-p)
Propagation Delay Times Channel Input-to-Channel Output (RL = 200 k) MC14067B
Any Pair of Address Inputs to Output MC14067B
Channel Turn-Off Time (RL = 300 k) MC14067B
Control Input-to-Channel Output Channel Turn-On Time (RL = 10 k) MC14067B
Characteristic
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fin = 20 MHz MC14067B
MC14067B
5 (Figure 7) (Figure 6) (Figure 5) tPLH, tPHL tPZH, tPZL tPLH, tPHL tPHZ, tPLZ Symbol BW -- -- -- -- (Figure 4) (Figure 4) (Figure 3) (Figure 5) VDD - VSS
Vdc
5.0 10 15
5.0 10 15
5.0 10 15
5.0 10 15
10 10 10 10 10
Typ (5.)
- 40
- 40
280 115 85
250 120 75
240 115 75
0.3
30 15 35 15 12
Max
700 290 215
625 300 190
600 290 190
90 40 30
-- -- -- -- --
MHz
Unit
mV dB dB ns ns ns ns %
MC14067B
ON SWITCH CONTROL SECTION OF IC LOAD V CONTROL SECTION OF IC OFF CHANNEL UNDER TEST VDD A VSS
OTHER CHANNEL(S)
VSS VDD
SOURCE
VSS VDD
Figure 1. V Across Switch
Figure 2. Off Channel Leakage
VC VDD A B C D INH Vin 20 ns Vin tPLH Vout 20 ns 90% 50% tPHL 50% VDD 10% VSS Vout VC RL PULSE GENERATOR
A B C D INH RL Vin VDD VSS VX VSS VDD 20 ns 90% 50% 10% 90%
Vout CL = 50 pF
Vout CL = 50 pF 20 ns
50% tPZH, tPZL tPHZ, tPLZ 10%
Vin = VDD VX = VSS Vin = VSS VX = VDD
Vout
50%
Figure 3. Propagation Delay Test Circuit and Waveforms Vin to Vout
Figure 4. Turn-On and Delay Turn-Off Test Circuit and Waveforms
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MC14067B
A, B, and C inputs used to turn ON or OFF the switch under test. A B C D INH Vin RL VDD A B C D INH Vout CL = 50 pF Vin RL ON RL
OFF
Vout CL = 50 pF
Figure 5. Bandwidth and Off-Channel Feedthrough Attenuation
Figure 6. Channel Separation (Adjacent Channels Used for Setup)
VC
A B C D INH R1 RL
Vout CL = 50 pF
Figure 7. Crosstalk, Control to Common O/I
VA VB
A B C D INH VDD
VDD KEITHLEY 160 DIGITAL MULTIMETER 10 k VDD 1 k RANGE
CL
Vout
VA
50%
X-Y PLOTTER
VB tPHL Vout
50% tPLH 50%
VSS
Figure 8. Channel Resistance (RON) Test Circuit
Figure 9. Propagation Delay, Any Pair of Address Inputs to Output
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MC14067B
TYPICAL RESISTANCE CHARACTERISTICS
350 R ON , "ON" RESISTANCE (OHMS) R ON , "ON" RESISTANCE (OHMS) 300 250 200 150 100 50 0 - 10 - 8.0 - 6.0 - 4.0 - 2.0 0 0.2 4.0 6.0 350 300 250 200 150 100 50 0 - 10 - 8.0 - 6.0 - 4.0 - 2.0 0 0.2 4.0 6.0 8.0 10 TA = 125C 25C - 55C
TA = 125C 25C - 55C
8.0
10
Vin, INPUT VOLTAGE (VOLTS)
Vin, INPUT VOLTAGE (VOLTS)
Figure 10. VDD = 7.5 V, VSS = - 7.5 V
Figure 11. VDD = 5.0 V, VSS = - 5.0 V
700 R ON , "ON" RESISTANCE (OHMS) RON , "ON" RESISTANCE (OHMS) 600 500 400 300 TA = 125C 200 25C 100 0 - 10 - 8.0 - 6.0 - 4.0 - 2.0 0 0.2 - 55C 4.0 6.0 8.0 10
350 300 250 200 150 5.0 V 100 50 0 - 10 - 8.0 - 6.0 - 4.0 - 2.0 0 0.2 4.0 6.0 8.0 10 7.5 V TA = 25C
VDD = 2.5 V
Vin, INPUT VOLTAGE (VOLTS)
Vin, INPUT VOLTAGE (VOLTS)
Figure 12. VDD = 2.5 V, VSS = - 2.5 V
Figure 13. Comparison at 25C, VDD = - VSS
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MC14067B
APPLICATIONS INFORMATION Figure A illustrates use of the Analog Multiplexer/Demultiplexer. The 0-to-5 volt Digital Control signal is used to directly control a 5 Vp-p analog signal. The digital control logic levels are determined by VDD and VSS. The VDD voltage is the logic high voltage; the VSS voltage is logic low. For the example. VDD = + 5 V = logic high at the control inputs; VSS = GND = 0 V = logic low. The maximum analog signal level is determined by VDD and VSS. The analog voltage must swing neither higher than VDD nor lower than VSS. The example shows a 5 Vp-p signal which allows no margin at either peak. If voltage transients above VDD and/or below VSS are anticipated on the analog channels, external diodes (Dx) are recommended as shown in Figure B. These diodes should be small signal types able to absorb the maximum anticipated current surges during clipping. The absolute maximum potential difference between VDD and VSS is 18.0 volts. Most parameters are specified up to 15 V which is the recommended maximum difference between VDD and VSS.
+5 V VDD VSS + 5.0 V 5 Vp-p ANALOG SIGNAL +5 V SWITCH I/O
COMMON O/I
5 Vp-p ANALOG SIGNAL
+ 2.5 V
MC14067B EXTERNAL CMOS DIGITAL CIRCUITRY 0-TO-5 V DIGITAL CONTROL SIGNALS
GND
Figure A. Application Example
VDD DX SWITCH I/O DX COMMON O/I
VDD DX
DX
VSS
VSS
Figure B. External Germanium or Schottky Clipping Diodes
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MC14067B
PACKAGE DIMENSIONS
PDIP-24 P SUFFIX CASE 709-02 ISSUE C
NOTES: 1. POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. DIM A B C D F G H J K L M N MILLIMETERS MIN MAX 31.37 32.13 13.72 14.22 3.94 5.08 0.36 0.56 1.02 1.52 2.54 BSC 1.65 2.03 0.20 0.38 2.92 3.43 15.24 BSC 0_ 15_ 0.51 1.02 INCHES MIN MAX 1.235 1.265 0.540 0.560 0.155 0.200 0.014 0.022 0.040 0.060 0.100 BSC 0.065 0.080 0.008 0.015 0.115 0.135 0.600 BSC 0_ 15_ 0.020 0.040
24
13
B
1 12
A N K H G F D
SEATING PLANE
C
L
M
J
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MC14067B
PACKAGE DIMENSIONS
SOIC-24 DW SUFFIX CASE 751E-04 ISSUE E
-A-
24 13 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS MIN MAX 15.25 15.54 7.40 7.60 2.35 2.65 0.35 0.49 0.41 0.90 1.27 BSC 0.23 0.32 0.13 0.29 0_ 8_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.601 0.612 0.292 0.299 0.093 0.104 0.014 0.019 0.016 0.035 0.050 BSC 0.009 0.013 0.005 0.011 0_ 8_ 0.395 0.415 0.010 0.029
-B-
12X
P 0.010 (0.25)
M
B
M
1
12
24X
D 0.010 (0.25)
M
J TA
S
B
S
F R C -T-
SEATING PLANE X 45 _
M
22X
G
K
DIM A B C D F G J K M P R
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MC14067B
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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MC14067B/D

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